Oki Achieves Lead-free Semiconductor Package Terminals at All Semiconductor Production Bases

"We will advance steadily toward our target: namely, to provide totally lead-free products on the market by the end of the fiscal year ending March 2004. This is just one of the wide-ranging environmental activities that represent Oki's group-wide commitment to environmental protection," said Masayoshi Ino, Executive Vice President at Oki Electric, responsible for the group's environmental protection strategies.

Oki has been developing its environmental protection programs since 1993, reflecting its high priority on environmental activities in corporate management policies throughout its group companies. As part of its "Oki Eco Plan 21" set forth in 2001, it set a goal of totally lead-free soldering for all products manufactured in Japan by the end of the fiscal year ending March 2004. The company has already completed the development of lead-free soldering to mount semiconductors to printed circuit boards (figure 1), and Nagano Oki Electric Co., Ltd., a wholly owned subsidiary, has begun mass production of lead-free soldered boards.

The technique developed by Oki involves a lead-free solder plating technology for semiconductor package terminals. There are two types for soldering terminals: a solder plating for the outer lead frame (figure 2), and soldering of solder balls (figure 3). Oki has selected Sn-Bi (tin, bismuth) for plating the outer lead frame and Sn-Ag-Cu (tin, silver, copper) for solder balls. These materials provide reasonable cost and quality and reliability higher than or equal to conventional Sn-Pb (tin, lead) materials. These materials do present the challenge of higher melting temperature, necessitating greater heat-resistance in certain device components. In response, the company took several measures, including the adoption of high heat-resistant mold resins, which enabled the success of reliable lead-free soldering.

Oki has confirmed the reliability of its lead-free soldering technology by implementing reliability tests for the major types of outer lead frames for semiconductor packages, including DIP (dual in-line package), QFP (quad flat package), and SOP (small out-line package), and also BGA (ball grid array) and CSP (chip scale package) types of ball-type semiconductor packages. The tests were conducted according to the conditions of the lead-free project defined by JEITA (Japan Electronics and Information Technology Industries Association).

The company has introduced lead-free plating equipment based on this technology in the assembly processes of production facilities, including Miyazaki Oki Electric Co., Ltd., and Oki (Thailand) Co., Ltd., as well as their business partners. These companies began mass production of lead-free semiconductor products in response to customer requests. Oki intends to expand lead-free reliability testing to various products to make all types of semiconductors lead-free by the end of March 2003.

Figure 1: Soldering of a printed circuit board and a semiconductor package pin

Figure 2: Solder plating for outer leads of semiconductor package

Figure 3: Solder balls of ball type semiconductor

Notes:

• DIP (dual in-line package):

A package for through-hole mounting with lead pins on two sides.

• QFP (quad flat package):

A thin surface-mounting package in which lead pins protrude from the package side in four directions.

• SOP (small out-line package):

A surface-mounting package in which lead pins protrude from the package side in two directions.

• BGA (ball grid array):

A surface-mounting package in which solder balls are arranged on the reverse sides of printed circuit board, instead of leads.

• CSP (chip scale package):

A surface-mounting package with outline size almost identical to LSI bare chip size.

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